The AI boom has triggered extreme global demand for memory chips, sending prices soaring and drawing not just Samsung, SK Hynix and Micron but also China's ChangXin Memory Technologies (CXMT) into the race to cash in. But a new report out of South Korea suggests CXMT is running into a serious wall: its yield on high bandwidth memory (HBM), the chip type most in demand for AI accelerators, is stuck at roughly 25 percent, meaning three out of every four chips it makes are defective. That leaves the Chinese memory maker an estimated four to five years behind its Korean rivals on the technology.
Why HBM Is So Much Harder To Get Right Than Standard DRAM
Tech outlet Wccftech, citing the Korean report, noted that HBM is far more complex to manufacture than conventional DRAM, which is part of why CXMT has been able to gain ground in the memory market in the first place. As Samsung, SK Hynix and Micron have poured their production capacity into HBM to meet AI demand, CXMT has stepped in to supply the ordinary DRAM chips those companies are producing less of, filling a gap in the broader market rather than competing head to head on the most advanced product.
South Korea's Chosun Ilbo reported that CXMT has already begun trial production of fourth-generation HBM3, but its early yield has refused to budge much past that 25 percent mark, only about a third of the roughly 80 percent "golden yield" the semiconductor industry treats as the mass-production benchmark.
The TSV Bottleneck Behind China's Yield Problem
By comparison, SK Hynix, which has mass-produced similar HBM chips since 2022, is now running yields above 90 percent, a gap industry watchers describe as stark. The consensus explanation centers on through-silicon via (TSV) technology, the process used to stack multiple layers of DRAM into a single HBM chip, where CXMT's process maturity still lags well behind its rivals.
An executive at a semiconductor equipment supplier familiar with CXMT's operations said that, as of September 9, the front-end process for CXMT's 8-layer stacked (8-Hi) HBM3 chips was yielding only around 30 percent, and that of the chips that clear that stage, only about 70 percent survive the back-end packaging process to become final, sellable products. Put together, that means starting a batch of 100 HBM3 chips currently ends with close to 80 being scrapped. CXMT is reportedly sending the small number of chips that do pass on to Chinese companies including Alibaba and Cambricon, while it continues working to raise yields.
How Big A Setback This Is For China's Chip Ambitions
The report is careful to note that the problem does not appear to be with CXMT's underlying DRAM capability. An industry source said CXMT's G4 process, at roughly the 17-nanometer node, works fine for producing ordinary DRAM, but HBM's far stricter specifications make hitting qualification standards much harder even on the same process technology.
TSV, in particular, is described as both the core enabling technology for HBM and one of the hardest processes in chipmaking to master. Industry sources say the gap between CXMT and the leading HBM makers is concentrated almost entirely there. As one semiconductor industry figure put it, TSV processes only stabilize after years of accumulated wafer-processing experience, and while Chinese manufacturers have closed the gap with global leaders quickly on conventional DRAM, the back-end process experience HBM demands is not something that can be caught up on in a short amount of time.
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