Powerchip Jacks Up DRAM Prices 45% as Shortage Runs Into 2027

Powerchip Semiconductor Manufacturing Corp. (PSMC, 6770.TW) told investors on July 14 that it raised DRAM wafer input prices by a further 45% in July and expects the global DRAM supply gap to persist through 2027, as cloud computing giants lock up memory capacity years in advance.

President Martin Chu said major cloud service providers have already pre-booked capacity from leading DRAM makers for years to come, tightening the industry's production allocation well into the future. He pointed to Micron Technology's (Nasdaq: MU) recent results as evidence that AI-driven memory demand is not the bubble some investors have feared. "The DRAM shortfall can actually continue," Chu told analysts. "We expect it to last until 2027."

Memory has overtaken logic foundry work as PSMC's single largest revenue source. According to the company's earnings presentation, DRAM's share of second-quarter revenue climbed to 46% from 38% in the first quarter, while flash memory held steady at 6% — together putting memory products at 52% of total revenue. The process mix tells a similar story: PSMC's 24-, 25- and 28-nanometer nodes, which carry much of its DRAM output, rose to 37% of revenue from 28%, while 30-nanometer output held at 15%. Fabless customers, many of them memory design houses and distributors that buy DRAM capacity, grew to 90% of PSMC's customer base from 83%.

Spokesperson Tan Chung-min said shipment volumes and average selling prices rose across both logic and DRAM products in the quarter, but DRAM price gains far outpaced the rest of the portfolio, pulling memory's share of revenue higher. The shift already shows up in the bottom line: PSMC's second-quarter revenue reached NT$17.29 billion (roughly US$540 million), up 27% from the prior quarter, while gross margin jumped to 28% from 10%. Chu said the improvement came mainly from higher prices rather than higher shipment volumes — a sign, he said, that recovering memory and foundry pricing, not volume growth, is now driving the business.

Chu said PSMC's July DRAM wafer input price increase amounted to a 45% structural adjustment compared with June shipping prices — one of the company's most significant recent repricing moves. Because wafers take time to move from input through production to shipment, he said, the July increase will not immediately show up in that month's results; products started under the new pricing are expected to begin shipping around November, when PSMC expects a more visible lift to revenue and profit.

Chu told analysts that gross margin, which reached 28% in the second quarter, should keep climbing through the third and fourth quarters, with November and December likely to show a "step-like" rise in both revenue and margin. He cautioned, however, that the 45% figure reflects PSMC's own wafer input pricing rather than a uniform increase across end-market DRAM prices, and that the ultimate revenue impact will depend on each customer's product mix, input volume, production yield and shipment timing.

Beyond riding the price cycle, PSMC is also working to raise the value of each wafer by upgrading its DRAM process technology. Chu said the company's in-house 1X DRAM process entered small-volume production in June and is now going through yield improvement and output ramp-up, with a larger-scale rollout planned for 2027 — what he called the first major milestone in PSMC's DRAM upgrade path.

Chairman Frank Huang said PSMC's DRAM lineup spans from low-capacity niche products to more advanced offerings, and that the company has no plans to abandon its existing product lines even as larger memory makers retreat from older, low-capacity specifications. Demand from consumer electronics, industrial controls and other niche applications remains steady, he said, and new process technology will instead be used to gradually improve cost and product value. Huang added that PSMC's self-developed DDR4 8Gb 1X product will move into production first, before the company advances toward the more demanding 1P process through its technology partnership with Micron — extending its DRAM lineup from niche products toward higher-value nodes.

Micron's 1P Line Targets Mid-2028 Production

PSMC's collaboration with Micron extends beyond the HBM back-end wafer manufacturing service known as PWF to cover DRAM 1P process technology as well. Chu said the new equipment needed for 1P production should arrive by the end of the first quarter of 2027, after which the process will move into development, calibration and validation, with mass production targeted for mid-2028. "By before the first quarter of 2027, we will have the new equipment set up and will begin process development," Chu said. "We expect to reach mass production around mid-2028." He added that the project remains on schedule and that PSMC will update investors as it progresses.

PSMC expects to introduce a new DRAM technology milestone each year — the 1X node in 2027, followed by the Micron-linked 1P process in 2028 — to sharpen its process competitiveness and expand what it can offer customers. Still, with mass production for 1P nearly two years away, equipment installation, technology transfer, yield improvement and customer qualification remain the key hurdles to watch before the timeline can be considered secure.

The memory squeeze extends beyond DRAM. Chu said a new generation of AI servers is driving rapid growth in demand for mainstream 3D NAND, prompting major memory makers to shift capacity away from older 2D NAND lines — a move that has squeezed supply of legacy SLC NAND. Even as most consumer storage products move to 3D NAND, networking equipment, industrial controls and Internet-of-Things devices still require the low-capacity, high-endurance chips that only SLC NAND provides. With AI workloads increasingly moving from the cloud to edge and on-device hardware this year, Chu said demand for that low-capacity memory has proven fairly inelastic, pushing SLC NAND prices higher since the second quarter.

PSMC is now working with customers to shift its SLC NAND foundry process to the more cost-competitive 20-nanometer node to boost wafer output and cost competitiveness. A newly developed MLC NAND product is currently in customer qualification and is expected to launch between late 2026 and early 2027.

AI servers and 5G base stations are also driving up demand for NOR Flash, which handles firmware storage, boot code and system control functions, as each device requires greater capacity. Chu said geopolitical pressure to diversify supply chains away from China has additionally worked in PSMC's favor, giving the company a distinctive position in the non-China NOR Flash foundry market. PSMC's NOR Flash wafer starts have now surpassed 1,000 wafers and are continuing to scale up.

Huang said PSMC's existing NOR Flash and SLC NAND businesses continue to ship steadily, and that as prices recover and new products launch, the company's memory business will increasingly rest on four legs — DRAM, SLC NAND, MLC NAND and NOR Flash — rather than DRAM alone.

Taken together, PSMC's July price increase, its 1X and 1P process roadmap, and its push across NAND and NOR Flash amount to a bet on both a memory price upcycle and a technology upgrade running in parallel. In the near term, whether the November pricing benefit arrives as planned will determine how much PSMC's gross margin improves in the second half of the year. Over the medium term, the company's progress ramping 1X yields — and whether its Micron-linked 1P process reaches mass production on schedule by mid-2028 — will shape how durable that improvement proves to be. （Related： Taiwan's Powerchip Rides TSMC CoWoS Overflow Into AI Packaging ｜ Latest ）

​Original Article in Chinese​