NVIDIA Chief Executive Jensen Huang (黃仁勳) announced at the GTC Taiwan conference on June 1 that Taiwan Semiconductor Manufacturing Co. (TSMC) has begun deploying NVIDIA's artificial intelligence and accelerated computing technologies across its chip design and manufacturing operations, targeting improvements in turnaround time, energy efficiency, yield rates, and fab productivity.
The announcement marks a significant deepening of the two companies' nearly three-decade relationship, with TSMC now applying NVIDIA's technology stack directly on the factory floor.
AI Enters the Fab: What TSMC Is Actually Deploying
According to technology publication Wccftech, as semiconductor processes advance to ever-smaller nodes, the computational demands of moving a chip from design to mass production have grown into one of the most complex engineering challenges in the industry. Computational lithography, transistor simulation, process control, and wafer inspection all increasingly require large-scale simulation, real-time optimization, and AI systems capable of handling physics modeling and image analysis.
TSMC is using several components of NVIDIA's CUDA-X library suite to accelerate these workloads across GPU infrastructure:
In computational lithography, TSMC has adopted NVIDIA's cuLitho — a GPU-accelerated library for mask design, exposure simulation, and pattern transfer — which, while maintaining the same total cost of ownership, can improve cost efficiency or reduce processing cycle times by 20% to 50% compared with traditional CPU-based approaches.
For transistor, device, and process simulation, TSMC is using NVIDIA cuEST, a GPU-accelerated electronic structure simulation library that can speed up chemical simulations by an average of 50 times in semiconductor materials design.
On advanced process control, TSMC is running NVIDIA's cuML machine learning library on NVIDIA GPUs to accelerate large-scale data analysis, extracting hundreds of thousands of process parameters from thousands of manufacturing steps to feed machine learning models and reduce process variation.
For fab operations optimization, TSMC is using CUDA-powered GPU-accelerated scheduling — including NVIDIA H200 GPUs — to improve its ability to handle complex production constraints, streamline manufacturing workflows, and maximize fab throughput.
Nanoscale Defect Detection and Virtual Fab Planning
As chip geometries shrink, even microscopic defects can affect quality and yield. TSMC is deploying NVIDIA's Metropolis platform alongside the NVIDIA TAO Toolkit to enhance defect classification, using visual AI to improve its ability to detect and categorize nanoscale defects.
Separately, TSMC is exploring the use of NVIDIA Omniverse libraries to build what it calls a "FabTwin" — a virtual fab environment designed to evaluate equipment configurations and simulate manufacturing workflows before physical construction begins. This "Virtual-First" approach allows engineers to compare complex layout options and identify potential bottlenecks earlier, accelerating key decisions ahead of capital expenditure commitments.
Statements from Leadership
Huang said the collaboration allows TSMC to bring AI and accelerated computing directly into the fab, using simulation and optimization to address the world's most complex design and manufacturing challenges, with the goal of improving the speed, efficiency, and yield of next-generation chips.
TSMC Chairman C.C. Wei (魏哲家) said the company's long-term partnership with NVIDIA is centered on advancing next-generation computing. He said TSMC is applying NVIDIA's accelerated computing and AI across fab operations optimization, lithography, process control, and inspection to strengthen its technology leadership and manufacturing excellence in support of the success of customers' future products.
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