Taiwan Semiconductor Manufacturing Company (TSMC) is breaking from its traditional approach to capacity planning, launching a major global push to expand 3-nanometer chip production as artificial intelligence applications drive unprecedented demand for advanced semiconductors.
The move, announced by TSMC Chairman C.C. Wei during the company's investor conference on Thursday, reflects the foundry's commitment to supporting customer innovation even after initial production targets at a given node are met. Wei emphasized that, as the world's leading contract chipmaker, TSMC's priority is to deliver cutting-edge technology and sufficient capacity to fuel breakthroughs across multiple sectors.
Under the new blueprint, TSMC will add a dedicated 3nm fab at the Tainan Science Park cluster in southern Taiwan, with volume production slated for the first half of 2027. In the United States, the company's second fab in Arizona — construction now complete — will adopt the 3nm process and begin mass output in the second half of 2027. A second facility in Japan will also incorporate 3nm technology, targeting volume production in 2028.
To accelerate supply, TSMC will convert existing 5nm equipment in Taiwan to support 3nm output and optimize capacity sharing across its 7nm, 5nm and 3nm lines.
The 3nm node, once primarily associated with flagship smartphone processors, has now become a versatile platform at the heart of the AI era. Demand in the coming years is expected to span smartphones, high-performance computing, AI accelerators, and the logic base dies used in high-bandwidth memory modules. Automotive and Internet of Things customers will also draw on the expanded capacity.
Progress on the next-generation 2nm family remains on track. TSMC's N2 process entered volume production in the fourth quarter of 2025 with strong yields and is ramping smoothly across multiple phases in Hsinchu and Kaohsiung. Supported by demand from smartphones, HPC and AI, the full 2nm lineup — including the upcoming N2P and A16 variants — is positioned to become another high-volume, long-lifecycle platform.
Looking further ahead, TSMC provided fresh details on its A14 technology, which employs a second-generation nanosheet transistor design. Compared with N2, A14 is expected to deliver a 10 to 15 percent speed gain at the same power level, or a 25 to 30 percent reduction in power consumption at equivalent performance, along with roughly 20 percent higher logic density. Development is proceeding as scheduled, with strong interest already emerging from smartphone and HPC clients. Mass production is targeted for 2028.
The expansion is not without short-term financial trade-offs. TSMC warned that the initial ramp of 2nm production in the second half of this year will dilute full-year 2026 gross margins by approximately 2 to 3 percentage points. Continued scaling of overseas fabs is projected to exert a similar 2 to 3 percent drag in the early years, potentially rising to 3 to 4 percent later.
Nevertheless, the company expects 3nm gross margins to surpass the corporate average in the second half of 2026, underpinned by robust demand and ongoing manufacturing efficiencies. TSMC views the 3nm family as the primary driver of overall profitability in the years ahead.
Despite current tightness across its fabs, TSMC said it will not favor any particular customer or platform, instead working to meet demand as broadly as possible. The company also noted that tensions in the Middle East could raise prices for certain chemicals and gases, creating modest earnings pressure, but diversified sourcing and safety stockpiles are expected to prevent any near-term disruption to operations.
TSMC's latest roadmap underscores its central role in powering the global AI surge while reinforcing its long-term technological leadership across Taiwan, the United States and Japan.













































